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CY26112 - One-PLL General Purpose Clock Generator

Datasheet Summary

Description

Reference Input Voltage Supply Analog Voltage Supply Output Enable, OE = 0 three-state; OE = 1 active Analog Ground LCLK Ground No Connect - Reserved 3.6864 MHz Clock output 1 at VDDL level 3.6864 MHz Clock output 2 at VDDL level Frequency Select Pin Ð FS = 0: 33 MHz, FS = 1: 66 MHz LCLK Voltage Sup

Features

  • Integrated phase-locked loop.
  • Low skew, low jitter, high accuracy outputs.
  • Frequency Select Pin.
  • 3.3V Operation with 2.5 V Output Option.
  • 16-TSSOP Part Number CY26112 Outputs 4 Input Frequency 14.7456 MHz Benefits Internal PLL with up to 333 MHz internal operation Meets critical timing requirements in complex system designs Dynamic frequency selection Enables.

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Datasheet Details

Part number CY26112
Manufacturer Cypress Semiconductor
File Size 150.62 KB
Description One-PLL General Purpose Clock Generator
Datasheet download datasheet CY26112 Datasheet
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Full PDF Text Transcription

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THIS SPEC IS OBSOLETE Spec No: 38-07096 Spec Title: CY26112 One-PLL General Purpose Clock Generator Sunset Owner: IJA Replaced by: N/A www.DataSheet4U.com CY26112 One-PLL General Purpose Clock Generator Features • Integrated phase-locked loop • Low skew, low jitter, high accuracy outputs • Frequency Select Pin • 3.3V Operation with 2.5 V Output Option • 16-TSSOP Part Number CY26112 Outputs 4 Input Frequency 14.7456 MHz Benefits Internal PLL with up to 333 MHz internal operation Meets critical timing requirements in complex system designs Dynamic frequency selection Enables application compatibility Industry standard package saves on board space Output Frequency Range 2 x 3.6864 MHz, 2 x 33/66 MHz (selectable) Logic Block Diagram Pin Configurations 3.6864 3.6864 XIN XOUT OSC.
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