Datasheet4U Logo Datasheet4U.com

CY62147V - 4M (256K x 16) Static RAM

Description

of read and write modes.

The CY62147V is a high-performance CMOS static RAM organized as 256K words by 16 bits.

These devices feature advanced circuit design to provide ultra-low active current.

Features

  • Wide voltage range: 2.7V.
  • 3.6V Ultra-low active, standby power Easy memory expansion with CE and OE features TTL-compatible inputs and outputs Automatic power-down when deselected CMOS for optimum speed/power Package available in a standard 44-pin TSOP Type II (forward pinout) package deselected (CE HIGH) or when CE is LOW and both BLE and BHE are HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-imp.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CY62146DV30 4M Bit Static RAM Cypress
CY62146G 4-Mbit (256K words x 16 bit) Static RAM Cypress
CY62146G-MoBL 4-Mbit (256K words x 16 bit) Static RAM Cypress
CY62146GE 4-Mbit (256K words x 16 bit) Static RAM Cypress
CY62146GESL 4-Mbit (256K words x 16 bit) Static RAM Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY62147VLL-70ZI 4M (256K x 16) Static RAM
CY621472E30 4-Mbit (256 K x 16) Static RAM
CY621472G 4-Mbit (256K words x 16 bit) Static RAM
CY621472G30 4-Mbit (256K words x 16 bit) Static RAM
CY621472GN 4-Mbit (256K words x 16 bit) Static RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CY62147V MoBL® 4M (256K x 16) Static RAM Features • • • • • • • Wide voltage range: 2.7V–3.6V Ultra-low active, standby power Easy memory expansion with CE and OE features TTL-compatible inputs and outputs Automatic power-down when deselected CMOS for optimum speed/power Package available in a standard 44-pin TSOP Type II (forward pinout) package deselected (CE HIGH) or when CE is LOW and both BLE and BHE are HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW.
Published: |