CY7C1387B Datasheet | Cypress

.. 86B CY7C1386B CY7C1387B 512K x 36/1M x 18 Pipelined DCD SRAM Features - - - - - - - - - - - - - Fast clock speed: 200, 167, 150, 133 MHz Provide high-performance 3-1-1-1 access rate Fast OE access times: 3.0, 3.4, 3.8, and 4.2 ns Optimal for depth expansion 3.3V (- 5% / +10%) power supply mon data inputs and data outputs Byte Write Enable and Global Write control Double-cycle deselect Chip enable for address pipeline Address, data, and control registers Internally self-timed Write cycle Burst control pins (interleaved or linear burst sequence) Automatic power-down available using ZZ mode or CE deselect High-density, high-speed packages JTAG boundary scan for BGA...