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CY7C185 - 8K x 8 Static RAM

Download the CY7C185 datasheet PDF. This datasheet also covers the CY7 variant, as both devices belong to the same 8k x 8 static ram family and are provided as variant models within a single manufacturer datasheet.

General Description

The CY7C185 is a high-performance CMOS static RAM organized as 8192 words by 8 bits.

Key Features

  • High speed.
  • 15 ns.
  • Fast tDOE.
  • Low active power.
  • 715 mW.
  • Low standby power.
  • 220 mW.
  • CMOS for optimum speed/power.
  • Easy memory expansion with CE1, CE2 and OE features.
  • TTL-compatible inputs and outputs.
  • Automatic power-down when deselected provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and three-state drivers. This device has an autom.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7-C185.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
1b CY 7C1 85 FOR REVIEW ONLY fax id: 1013 CY7C185 8K x 8 Static RAM Features • High speed — 15 ns • Fast tDOE • Low active power — 715 mW • Low standby power — 220 mW • CMOS for optimum speed/power • Easy memory expansion with CE1, CE2 and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and three-state drivers. This device has an automatic power-down feature (CE1 or CE2), reducing the power consumption by 70% when deselected. The CY7C185 is in a standard 300-mil-wide DIP and SOJ package. An active LOW write enable signal (WE) controls the writing/reading operation of the memory.