CY7C187 Datasheet | Cypress

64K x 1 Static RAM Features - High speed - 15 ns - CMOS for optimum speed/power - Low active power - 495 m W - Low standby power - 220 m W - TTL patible inputs and outputs - Automatic power-down when deselected vided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C187 has an automatic power-down feature, reducing the power consumption by 56% when deselected. Writing to the device is acplished when the Chip Enable (CE) and Write Enable (WE) inputs are both LOW. Data on the input pin (DIN) is written into the memory location specified on the address pins (A0 through A15). Reading the device is acplished by taking the Chip Enable (CE) LOW, while Write Enable (WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address pin will appear on the data output (DOUT) pin. The output pin stays in high-impedance state when Chip Enable (CE) is HIGH or Write Enable (WE) is LOW. The CY7C187 utilizes a die coat to insure alpha immunity. Functional Description The CY7C187 is a high-performance CMOS static RAM organized as 65,536 words x 1 bit. Easy memory expansion is pro- Logic Block Diagram Pin Configurations DI INPUT BUFFER A0 A1 A2 A3 A4 A5 NC A6 A7 DOUT WE GND SOJ Top View 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC A15 A14 A13 A12 NC A11 A10 A9 A8 DIN CE A0 A1 A2 A3 A4 A5 A6 A7 DOUT WE GND DIP Top View 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 17 16 15 14 13 12 VCC A15 A14 A13 A12 A11 A10 A9 A8 DIN CE A12 A13 A14 A15 A0 A1 A2 A3 ROW DECODER 256 x 256 ARRAY SENSE AMPS C187- 3 C187- 2 COLUMN DECODER POWER DOWN WE A4 A5 A6 A7 A8 A9 A10 A11 C187-...