CY7C188 Datasheet | Cypress

.. 32K x 9 Static RAM Features - High speed - 15 ns - Automatic power-down when deselected - Low active power - 660 m W - Low standby power - 140 m W - CMOS for optimum speed/power - TTL-patible inputs and outputs - Easy memory expansion with CE1, CE2, and OE Features provided by an active-LOW chip enable (CE1), an active-HIGH chip enable (CE2), an active-LOW output enable (OE), and three-state drivers. The device has an automatic power-down feature that reduces power consumption by more than 75% when deselected. Writing to the device is acplished by taking CE1 and write enable (WE) inputs LOW and CE2 input HIGH. Data on the nine I/O pins (I/Oo - I/O8) is then written into the location specified on the address pins (A0 - A14). Reading from the device is acplished by taking CE1 and OE LOW while forcing WE and CE2 HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The nine input/output pins (I/O0 - I/O8) are placed in a high-impedance state when the device is deselected (CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW, CE2 HIGH, and WE LOW). The CY7C188 is available in standard 300-mil-wide SOJs. Functional Description The CY7C188 is a high-performance CMOS static RAM organized as 32,768 words by 9 bits. Easy memory expansion is Logic Block Diagram Pin Configuration DIP/SOJ Top View NC NC A8 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 I/O3 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A14 CE2 WE A13 A9 A10 A11 OE A12 CE1 I/O8 I/O7 I/O6 I/O5 I/O4 I/O0 INPUT BUFFER I/O1 I/O2 SENSE AMPS A0 A1 A2 A3 A4 A5 A6 ROW DECODER I/O3 I/O4 I/O5 32K x 9...