Datasheet4U Logo Datasheet4U.com

GVT71512C18 - 256K X 36/512K X 18 Pipelined SRAM

This page provides the datasheet information for the GVT71512C18, a member of the GVT71256C36 256K X 36/512K X 18 Pipelined SRAM family.

Description

The Cypress Synchronous Burst SRAM family employs high-speed, low power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology.

Each memory cell consists of four transistors and two high valued resistors.

Features

  • Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns.
  • Fast clock speed: 225 MHz, 200 MHz, 166 MHz, and 150 MHz.
  • Fast OE access times: 2.5 ns, 3.0 ns, and 3.5 ns.
  • Optimal for performance (two cycle chip deselect, depth expansion without wait state).
  • 3.3V.
  • 5% and +10% power supply.
  • 3.3V or 2.5V I/O supply.
  • 5V tolerant inputs except I/Os.
  • Clamp diodes to V SS at all inputs and outputs.
  • Common data inputs and data out.

📥 Download Datasheet

Datasheet preview – GVT71512C18

Datasheet Details

Part number GVT71512C18
Manufacturer Cypress Semiconductor
File Size 358.15 KB
Description 256K X 36/512K X 18 Pipelined SRAM
Datasheet download datasheet GVT71512C18 Datasheet
Additional preview pages of the GVT71512C18 datasheet.
Other Datasheets by Cypress Semiconductor

Full PDF Text Transcription

Click to expand full text
( DataSheet : www.DataSheet4U.com ) CY7C1366A/GVT71256C36 CY7C1367A/GVT71512C18 256K x 36/512K x 18 Pipelined SRAM Features • Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns • Fast clock speed: 225 MHz, 200 MHz, 166 MHz, and 150 MHz • Fast OE access times: 2.5 ns, 3.0 ns, and 3.5 ns • Optimal for performance (two cycle chip deselect, depth expansion without wait state) • 3.3V –5% and +10% power supply • 3.3V or 2.
Published: |