Download CY7C1351F Datasheet PDF
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CY7C1351F Description

[1] The CY7C1351F is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM desi.

CY7C1351F Key Features

  • Can support up to 133-MHz bus operations with zero wait states
  • Data is transferred on every clock
  • Pin patible and functionally equivalent to ZBT™ devices
  • Internally self-timed output buffer control to eliminate the need to use OE
  • Registered inputs for flow-through operation
  • Byte Write capability
  • 128K x 36 mon I/O architecture
  • 2.5V / 3.3V I/O power supply
  • Fast clock-to-output times
  • 6.5 ns (for 133-MHz device)