M12L128168A-6TIG2S Overview
Description
The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.
Key Features
- CAS Latency ( 2 & 3 )
- Burst Length ( 1, 2, 4, 8 & full page )
