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M13L32321A Datasheet Double Data Rate SDRAM

Manufacturer: ESMT (Elite Semiconductor Microelectronics Technology)

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Overview

ESMT DDR SDRAM M13L32321A (2G) 512K x 32 Bit x 2 Banks Double Data Rate.

Key Features

  • z Double-data-rate architecture, two data transfers per clock cycle z Bi-directional data strobe (DQS) z Differential clock inputs (CLK and CLK ) z DLL aligns DQ and DQS transition with CLK transition z Two bank operation z CAS Latency : 2, 2.5, 3 z Burst Type : Sequential and Interleave z Burst Length : 2, 4, 8 z All inputs except data & DM are sampled at the rising edge of the system clock(CLK) z Data I/O transitions on both edges of data strobe (DQS) z DQS is edge-aligned with data for READs;.

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