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M53D1G3232A Datasheet Mobile DDR SDRAM

Manufacturer: ESMT (Elite Semiconductor Microelectronics Technology)

Overview

ESMT (Prliminary) Mobile DDR SDRAM.

Key Features

  • JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe (DQS) No DLL; CLK to DQS is not synchronized. Differential clock inputs (CLK and CLK ) Four bank operation CAS Latency : 2, 3 Burst Type : Sequential and Interleave Burst Length : 2, 4, 8, 16 Special function support - PASR (Partial Array Self Refresh) - Internal TCSR (Temperature Compensated Self Refresh) - DS (Drive Strength) - Deep Power Down (DPD) Mode - Status Read Reg.