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M24L28256DA - 2-Mbit (256K x 8) Pseudo Static RAM

General Description

of read and write modes.

The M24L28256DA is a high-performance CMOS pseudo static RAM (PSRAM) organized as 256K words by 8 bits.

Key Features

  • Advanced low-power architecture.
  • High speed: 55 ns, 70 ns.
  • Wide voltage range: 2.7V to 3.3V.
  • Typical active current: 1 mA @ f = 1 MHz.
  • Low standby power.
  • Automatic power-down when deselected www. DataSheet4U. com M24L28256DA 2-Mbit (256K x 8) Pseudo Static RAM Enable ( WE ) inputs LOW and Chip Enable Two ( CE 2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A1.

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Datasheet Details

Part number M24L28256DA
Manufacturer Elite Semiconductor Memory Technology
File Size 254.32 KB
Description 2-Mbit (256K x 8) Pseudo Static RAM
Datasheet download datasheet M24L28256DA Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ESMT PSRAM Features •Advanced low-power architecture •High speed: 55 ns, 70 ns •Wide voltage range: 2.7V to 3.3V •Typical active current: 1 mA @ f = 1 MHz •Low standby power •Automatic power-down when deselected www.DataSheet4U.com M24L28256DA 2-Mbit (256K x 8) Pseudo Static RAM Enable ( WE ) inputs LOW and Chip Enable Two ( CE 2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A17). Reading from the device is accomplished by asserting the Chip Enable One ( CE 1) and Output Enable ( OE ) inputs LOW while forcing Write Enable ( WE ) HIGH. And Chip Enable Two ( CE 2) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.