Datasheet4U Logo Datasheet4U.com

M24L48512DA - 4-Mbit (512K x 8) Pseudo Static RAM

General Description

of read and write modes.

The M24L48512DA is a high-performance CMOS pseudo static RAM (PSRAM) organized as 512K words by 8 bits.

Key Features

  • Advanced low power architecture High speed: 55 ns, 60 ns and 70 ns Wide voltage range: 2.7V to 3.6V Typical active current: 1mA @ f = 1 MHz Low standby power Automatic power-down when deselected Enable ( WE )inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O15) is then written into the location specified on the address pins (A0 through A18). Reading from the device is accomplished by asserting.

📥 Download Datasheet

Datasheet Details

Part number M24L48512DA
Manufacturer Elite Semiconductor Memory Technology
File Size 309.44 KB
Description 4-Mbit (512K x 8) Pseudo Static RAM
Datasheet download datasheet M24L48512DA Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ESMT PSRAM www.DataSheet4U.com M24L48512DA 4-Mbit (512K x 8) Pseudo Static RAM Features • • • • • • Advanced low power architecture High speed: 55 ns, 60 ns and 70 ns Wide voltage range: 2.7V to 3.6V Typical active current: 1mA @ f = 1 MHz Low standby power Automatic power-down when deselected Enable ( WE )inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O15) is then written into the location specified on the address pins (A0 through A18). Reading from the device is accomplished by asserting the Chip Enable One ( CE1 ) and Output Enable ( OE ) inputs LOW while forcing Write Enable ( WE ) HIGH and Chip Enable Two(CE2) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.