Datasheet4U Logo Datasheet4U.com

M24L48512SA - 4-Mbit (512K x 8) Pseudo Static RAM

General Description

of read and write modes.

The M24L48512SA is a high-performance CMOS pseudo static RAM (PSRAM) organized as 512K words by 8 bits.

Key Features

  • Advanced low power architecture High speed: 55 ns, 60 ns and 70 ns Wide voltage range: 2.7V to 3.6V Typical active current: 1mA @ f = 1 MHz Low standby power Automatic power-down when deselected consumption dramatically when deselected. Writing to the device is accomplished by taking Chip Enable ( CE ) and Write Enable ( WE ) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the a.

📥 Download Datasheet

Datasheet Details

Part number M24L48512SA
Manufacturer Elite Semiconductor Memory Technology
File Size 304.91 KB
Description 4-Mbit (512K x 8) Pseudo Static RAM
Datasheet download datasheet M24L48512SA Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ESMT PSRAM www.DataSheet4U.com M24L48512SA 4-Mbit (512K x 8) Pseudo Static RAM Features • • • • • • Advanced low power architecture High speed: 55 ns, 60 ns and 70 ns Wide voltage range: 2.7V to 3.6V Typical active current: 1mA @ f = 1 MHz Low standby power Automatic power-down when deselected consumption dramatically when deselected. Writing to the device is accomplished by taking Chip Enable ( CE ) and Write Enable ( WE ) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18).Reading from the device is accomplished by asserting the Chip Enable ( CE ) and Output Enable ( OE ) inputs LOW while forcing Write Enable ( WE ) HIGH .