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EDD5116AGTA-4 Datasheet 512M bits DDR SDRAM

Manufacturer: Elpida Memory

Download the EDD5116AGTA-4 datasheet PDF. This datasheet also includes the EDD5108AGTA-4 variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (EDD5108AGTA-4_ElpidaMemory.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number EDD5116AGTA-4
Manufacturer Elpida Memory
File Size 561.99 KB
Description 512M bits DDR SDRAM
Download EDD5116AGTA-4 Download (PDF)

Overview

DATA SHEET 512M bits DDR SDRAM EDD5108AGTA-4 (64M words × 8 bits) EDD5116AGTA-4 (32M words × 16 bits) Specifications • Density: 512M bits • Organization ⎯ 16M words × 8 bits × 4 banks (EDD5108AGTA) ⎯ 8M words × 16 bits × 4 banks (EDD5116AGTA) • Package: 66-pin plastic TSOP (II) ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 2.5V ± 0.125V • Data rate: 500Mbps (max.) • Four internal banks for concurrent operation • Interface: SSTL_2 • Burst lengths (BL): 2, 4, 8 • Burst type (BT): ⎯ Sequential (2, 4, 8) ⎯ Interleave (2, 4, 8) • /CAS Latency (CL): 3 • Precharge: auto precharge option for each burst access • Driver strength: normal/weak • Refresh: auto-refresh, self-refresh • Refresh cycles: 8192 cycles/64ms ⎯ Average refresh period: 7.8μs • Operating ambient temperature range ⎯ TA = 0°C to +70°C www.DataSheet4U.

Key Features

  • Double-data-rate architecture; two data transfers per clock cycle.
  • The high-speed data transfer is realized by the 2 bits prefetch pipelined architecture.
  • Bi-directional data strobe (DQS) is transmitted /received with data for capturing data at the receiver.
  • Data inputs, outputs, and DM are synchronized with DQS.
  • DQS is edge-aligned with data for READs; centeraligned with data for WRITEs.
  • Differential clock inputs (CK and /CK).
  • DLL.