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EDS5108ABTA - 512M bits SDRAM

Datasheet Summary

Description

The EDS5104AB is a 512M bits SDRAM organized as 33,554,432 words × 4 bits × 4 banks.

The EDS5108AB is a 512M bits SDRAM organized as 16,777,216 words × 8 bits × 4 banks.

The EDS5116AB is a 512M bits SDRAM organized as 8,388,608 words × 16 bits × 4 banks.

Features

  • 3.3V power supply Clock frequency: 166MHz/133MHz (max. ) LVTTL interface Single pulsed /RAS 4 banks can operate simultaneously and independently.
  • Burst read/write operation and burst read/single write operation capability.
  • Programmable burst length (BL): 1, 2, 4, 8, full page.
  • 2 variations of burst sequence  Sequential (BL = 1, 2, 4, 8, full page)  Interleave (BL = 1, 2, 4, 8).
  • Programmable /CAS latency (CL):.

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Datasheet Details

Part number EDS5108ABTA
Manufacturer Elpida Memory
File Size 564.36 KB
Description 512M bits SDRAM
Datasheet download datasheet EDS5108ABTA Datasheet
Additional preview pages of the EDS5108ABTA datasheet.

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Full PDF Text Transcription

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PRELIMINARY DATA SHEET 512M bits SDRAM EDS5104ABTA (128M words × 4 bits) EDS5108ABTA (64M words × 8 bits) EDS5116ABTA (32M words × 16 bits) Description The EDS5104AB is a 512M bits SDRAM organized as 33,554,432 words × 4 bits × 4 banks. The EDS5108AB is a 512M bits SDRAM organized as 16,777,216 words × 8 bits × 4 banks. The EDS5116AB is a 512M bits SDRAM organized as 8,388,608 words × 16 bits × 4 banks. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54pin plastic TSOP (II). Pin Configurations /xxx indicates active low signal.
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