EM488M3244VBB Overview
The EM488M3244VBB is Synchronous Dynamic Random Access Memory (SDRAM) organized as 2Meg words x 4 banks by 32 bits. All inputs and outputs are synchronized with the positive edge of the clock. The 256Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 3.3V low power memory.
EM488M3244VBB Key Features
- Fully Synchronous to Positive Clock Edge
- Single 3.3V ±0.3V Power Supply
- LVTTL patible with Multiplexed Address
- Programmable Burst Length (B/L)
- 1, 2, 4, 8
- Programmable CAS Latency (C/L)
- 2 or 3
- Data Mask (DQM) for Read / Write Masking
- Programmable Wrap Sequence
- Sequential (B/L = 1/2/4/8/full Page)