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EM562161 - 128K x 16 Low Power SRAM

General Description

Symbol A0 - A16 DQ0 - DQ15 CE1#, CE2 OE# WE# LB#, UB# GND VDD NC Function Address Inputs Data Inputs / Outputs Chip Enable Inputs Output Enable Read / Write Control Input Data Byte Control Inputs Ground Power Supply No Connection A LB # O E# A0 A1 A2 CE 2 B DQ 8 UB # A3 A4 CE1 # DQ 0

Key Features

  • Single power supply voltage of 2.7V to 3.6V.
  • Power down features using CE1# and CE2.
  • Low operating current : 30mA(max for 55 ns).
  • Maximum Standby current : 10µA at 3.6 V.
  • Data retention supply voltage: 1.5V to 3.6V.
  • Direct TTL compatibility for all input and output.
  • Wide operating temperature range: -40°C to 85°C.
  • Package type: 48-ball TFBGA, 6x8mm EM562161 128K x 16 Low Power SRAM Preliminary, Rev 1.0 07/2001 circuit tec.

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Full PDF Text Transcription for EM562161 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for EM562161. For precise diagrams, and layout, please refer to the original PDF.

EtronTech Features • Single power supply voltage of 2.7V to 3.6V • Power down features using CE1# and CE2 • Low operating current : 30mA(max for 55 ns) • Maximum Standby ...

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d CE2 • Low operating current : 30mA(max for 55 ns) • Maximum Standby current : 10µA at 3.6 V • Data retention supply voltage: 1.5V to 3.6V • Direct TTL compatibility for all input and output • Wide operating temperature range: -40°C to 85°C • Package type: 48-ball TFBGA, 6x8mm EM562161 128K x 16 Low Power SRAM Preliminary, Rev 1.0 07/2001 circuit technology provides both high speed and low power. It is automatically placed in low-power mode when chip enable (CE1#) is asserted high or (CE2) is asserted low. There are three control inputs. CE1# and CE2 are used to select the device and for data retention control, and output

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