EMD50N10A Datasheet | Excelliance MOS

N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 100V RDSON (MAX.) 50mΩ 25A UIS, Rg 100% Tested Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 100 °C Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 L = 0.1m H, ID=25A, RG=25Ω L = 0.05m H Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range VGS ID IDM IAS EAS EAR PD Tj, Tstg THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction‐to‐Case RJC Junction‐to‐Ambient RJA 1Pulse width limited by maximum junction temperature. 2Duty cycle  1％ TYPICAL LIMITS ±25 25 17 100 25 31.25 15.6 41 16 ‐55 to 150 UNIT V A m J W °C MAXIMUM 3.0...