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EMF20P02VAT
P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
D
BVDSS
‐12V
RDSON (MAX.)
20mΩ
ID
‐9.5A
G
S Pb‐Free Lead Plating & Halogen Free
Bottom View
S
D
D
S
D
GD D
PIN 1
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
VGS ID IDM PD Tj, Tstg
LIMITS ±8 ‐9.5 ‐7.0 ‐38 2.08 1.33
‐55 to 150
UNIT V
A
W °C
THERMAL RESISTANCE RATINGS THERMAL RESISTANCE
SYMBOL
Junction‐to‐Case
RJC
Junction‐to‐Ambient3
RJA
1Pulse width limited by maximum junction temperature.
EMF20P02VAT Datasheet
