EMF20P02VAT Datasheet | Excelliance MOS

P‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS ‐12V RDSON (MAX.) 20mΩ ‐9.5A S Pb‐Free Lead Plating & Halogen Free Bottom View GD D PIN 1 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TA = 25 °C TA = 70 °C Power Dissipation TA = 25 °C TA = 70 °C Operating Junction & Storage Temperature Range VGS ID IDM PD Tj, Tstg LIMITS ±8 ‐9.5 ‐7.0 ‐38 2.08 1.33 ‐55 to 150 UNIT V W °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction‐to‐Case RJC Junction‐to‐Ambient3 RJA 1Pulse width limited by maximum junction temperature. 2Duty cycle  1％ 360°C / W when mounted on a 1 in2 pad of 2 oz...