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FDG6318P - Dual P-Channel/ Digital FET

General Description

These dual P-Channel logic level enhancement mode MOSFET are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize on-state resistance.

Key Features

  • 0.5 A,.
  • 20 V. RDS(ON) = 780 mΩ @ VGS =.
  • 4.5 V RDS(ON) = 1200 mΩ @ VGS =.
  • 2.5 V.
  • Very low level gate drive requirements allowing direct operation in 3V circuits (VGS(th) < 1.5V).
  • Compact industry standard SC70-6 surface mount package.

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Full PDF Text Transcription (Reference)

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FDG6318P January 2003 FDG6318P Dual P-Channel, Digital FET General Description These dual P-Channel logic level enhancement mode MOSFET are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETS. Features • –0.5 A, –20 V. RDS(ON) = 780 mΩ @ VGS = –4.5 V RDS(ON) = 1200 mΩ @ VGS = –2.5 V • Very low level gate drive requirements allowing direct operation in 3V circuits (VGS(th) < 1.5V).