FDMA1025P Datasheet | Fairchild Semiconductor

Features General Description July 2014 - Max r DS(on) = 155m: at VGS = - 4.5V, ID = - 3.1A - Max r DS(on) = 220m: at VGS = - 2.5V, ID = - 2.3A - Low profile - 0.8mm maximum - in the new package Micro FET 2X2 mm - Ro HS pliant - Free from halogenated pounds and antimony oxides This device is designed specifically as a single package solution for the battery charge switch in cellular handset and other ultra portable applications. It features two independent P-Channel MOSFETs with low on-state resistance for minimum conduction losses. When connected in the typical mon source configuration, bi-directional current flow is possible. The Micro FET 2X2 package offers exceptional thermal performance for its physical size and well suited to linear mode applications. Application - DC - DC Conversion PIN 1 S1 G1 D2 D1 D2 S1 1 G1 2 6 D1 5 G2 D1 G2 S2 Micro FET 2X2 D2 3 4 S2 MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Power Dissipation for Single Operation Power Dissipation Operating and Storage Junction Temperature Range Thermal Characteristics...