HD74HCT540 Datasheet | Hitachi Semiconductor

Description The HD74HCT540 is an inverting buffer and the HD74HCT541 is a non-inverting buffer. The 3-state control gate operates as a two-input NOR such that if either G1 or G2 are high, all eight outputs are in the high-impedance state. Features - - - - - - LSTTL Output Logic Level patibility as well as CMOS Output patibility High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 p F) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs G1 L L H X X : Z : G2 L L X H A L H X X Outputs Y HD74HCT540 H L Z Z HD74HCT541 L H Z Z irrelevant Off (high-impedance) state of a 3-state output. HD74HCT540/HD74HCT541 Pin Arrangement G1 A1 A2 A3 A4 A5 A6 A7 A8 1 2 3 4 5 6 7 8 9 20 VCC 19 G2 18 Y1 17 Y2 16 Y3 15 Y4 14 Y5 13 Y6 12 Y7 11 Y8 (Top view) GND 10 HD74HCT541 G1 A1 A2 A3 A4 A5 A6 A7 A8 1 2 3 4 5 6 7 8 9 20 VCC 19 G2 18 Y1 17 Y2 16 Y3 15 Y4 14 Y5 13 Y6 12 Y7 11 Y8 (Top view) GND 10 HD74HCT540/HD74HCT541 Absolute Maximum Ratings Item Supply voltage range Input voltage Output voltage Output current DC current drain per VCC, GND DC input diode current DC output diode current Power dissipation per package Storage temperature Symbol VCC VIN VOUT I OUT I CC, I GND I IK I OK PT Tstg Rating - 0.5 to +7.0 - 0.5 to VCC + 0.5 - 0.5 to VCC + 0.5 ±35 ±75 ±20 ±20 500 - 65 to +150 Unit V V V m A m A m A m A m W °C DC Characteristics Ta = 25°C Item Input voltage Symbol VIH VIL Output voltage VOH Ta = - 40 to +85°C Max - 0.8 - - 0.1 0.33 ±5.0 ±1.0 40 µA µA µA V Unit V V V Test Conditions VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 5.5 5.5 5.5 Vin = VIH or VIL I OH = - 20 µA I OH = - 6 m A Vin = VIH or VIL I OL = 20 µA I OL = 6 m A Vin = VIH or VIL, Vout = VCC or GND Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA Min Typ Max Min 2.0 - 4.4 - - - - 2.0 - -...