HY57V281620HST - (HY57V281620HC(L/S)T) 4 Banks x 2M x 16-Bits SDRAM

This page provides the datasheet information for the HY57V281620HST, a member of the HY57V281620HCT (HY57V281620HC(L/S)T) 4 Banks x 2M x 16-Bits SDRAM family.

Product Overview

Hynix Semiconductor

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Datasheet Details

Part number	HY57V281620HST
Manufacturer	Hynix Semiconductor
File Size	262.25 KB
Description	(HY57V281620HC(L/S)T) 4 Banks x 2M x 16-Bits SDRAM
Datasheet	HY57V281620HST Datasheet
Additional preview pages of the HY57V281620HST datasheet.

HY57V281620HST Product details

Description

The Hynix HY57V281620HC(L/S)T is a 134,217,728bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth.

Features

Single 3.3±0.3V power supply All device pins are compatible with LVTTL interface JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin pitch All inputs and outputs referenced to positive edge of system clock Data mask function by UDQM or LDQM Internal four banks operation.
Auto refresh and self refresh 4096 refresh cycles / 64ms Programmable Burst Length and Burst Type - 1, 2, 4, 8 or Full page for Sequential Burst.
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Other Datasheets by Hynix Semiconductor

HY57V281620HCT - (HY57V281620HC(L/S)T) 4 Banks x 2M x 16-Bits SDRAM
HY57V281620HLT - (HY57V281620HC(L/S)T) 4 Banks x 2M x 16-Bits SDRAM
HY57V281620A - 4 Banks x 2M x 16bits Synchronous DRAM
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HY57V281620ELTP - Synchronous DRAM Memory 128Mbit (8M x 16bit)
HY57V281620EST - Synchronous DRAM Memory 128Mbit (8M x 16bit)
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Published: Apr 19, 2006 |