HY5DU121622ALT Datasheet PDF (512Mb DDR SDRAM) | Download Hynix Semiconductor HY5DU121622ALT

HY5DU121622ALT - 512Mb DDR SDRAM

This page provides the datasheet information for the HY5DU121622ALT, a member of the HY5DU12822AT 512Mb DDR SDRAM family.

Description

and is subject to change without notice.

Hynix semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chip DLL ali.

Datasheet Details

Part number	HY5DU121622ALT
Manufacturer	Hynix Semiconductor
File Size	427.98 KB
Description	512Mb DDR SDRAM
Datasheet	HY5DU121622ALT Datasheet
Additional preview pages of the HY5DU121622ALT datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com HY5DU12422A(L)T HY5DU12822A(L)T HY5DU121622A(L)T 512Mb DDR SDRAM HY5DU12422A(L)T HY5DU12822A(L)T HY5DU121622A(L)T This document is a general product description and is subject to change without notice. Hynix semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.0/Feb. 2003 1 www.DataSheet4U.com HY5DU12422A(L)T HY5DU12822A(L)T HY5DU121622A(L)T Revision History 1. Rev 0.0 (Feb. 19) 1) Datasheet Release in Preliminary version Rev. 0.0/Feb. 2003 2 www.DataSheet4U.

Published: Sep 20, 2009 |