HY5DV641622AT Description
and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied.
HY5DV641622AT Key Features
- 3.3V for VDD and 2.5V for VDDQ power supply All inputs and outputs are patible with SSTL_2 interface JEDEC standard 400m
- data transaction aligned to bidirectional data strobe (DQS) x16 device has 2 bytewide data strobes (LDQS, UDQS) per each
- All addresses and control inputs except Data, Data strobes and Data masks latched on the rising edges of the clock Write