Datasheet Details
| Part number | ICSSSTUAF32868A |
|---|---|
| Manufacturer | IDT |
| File Size | 569.76 KB |
| Description | 28-BIT CONFIGURABLE REGISTERED BUFFER |
| Datasheet |
 ICSSSTUAF32868A Datasheet
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General Description
This 28-bit 1:2 configurable registered buffer is designed for 1.7V to 1.9V VDD operation.
All inputs are compatible with the JEDEC standard for SSTL_18, except the chip-select gate-enable (CSGEN), control (C), and reset (RESET) inputs, which are LVCMOS.
Key Features
- 28-bit 1:2 registered buffer with parity check functionality.
- Supports SSTL_18 JEDEC specification on data inputs and outputs.