ICSSSTUAF32869A Overview
The ICSSSTUAF32869A is 14-bit 1:2 registered buffer with parity, designed for 1.7 V to 1.9 V VDD operation. All clock and data inputs are patible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS.
ICSSSTUAF32869A datasheet by IDT.
| Part number | ICSSSTUAF32869A |
|---|---|
| Datasheet | ICSSSTUAF32869A_IDT.pdf |
| File Size | 529.65 KB |
| Manufacturer | IDT |
| Description | 14-BIT CONFIGURABLE REGISTERED BUFFER |
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The ICSSSTUAF32869A is 14-bit 1:2 registered buffer with parity, designed for 1.7 V to 1.9 V VDD operation. All clock and data inputs are patible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS.
| Part Number | Description |
|---|---|
| ICSSSTUAF32865A | 25-BIT CONFIGURABLE REGISTERED BUFFER |
| ICSSSTUAF32866B | 25-BIT CONFIGURABLE REGISTERED BUFFER |
| ICSSSTUAF32866C | 25-BIT CONFIGURABLE REGISTERED BUFFER |
| ICSSSTUAF32868A | 28-BIT CONFIGURABLE REGISTERED BUFFER |
| ICSSSTUAF32868B | 28-BIT CONFIGURABLE REGISTERED BUFFER |
| ICSSSTUAH32865A | 25-BIT CONFIGURABLE REGISTERED BUFFER |
| ICSSSTUAH32868A | 28-BIT CONFIGURABLE REGISTERED BUFFER |
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