Description
The IDT71V3557/59 are 3.3V high-speed 4,718,592-bit (4.5 Megabit) synchronou
Features
- 128K x 36, 256K x 18 memory configurations.
- Supports high performance system speed - 100 MHz
(7.5 ns Clock-to-Data Access).
- ZBTTM Feature - No dead cycles between write and read
cycles.
- Internally synchronized output buffer enable eliminates
the need to control OE.
- Single R/W (READ/WRITE) control pin.
- 4-word burst capability (Interleaved or linear).
- Individual byte write (BW1 - BW4) control (May tie active).
- Three chip enables for simple depth expansion.
IDT71V3557SA Datasheet
