IS61WV6416EEBLL Datasheet | ISSI

IS61WV6416EEBLL IS64WV6416EEBLL 64K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH ECC MARCH 2020 Features - High-speed access time: 8, 10 ns - Low Active Power: 85 m W (typical) - Low Standby Power: 7 m W (typical) CMOS standby - Single power supply - Fully static operation: no clock or refresh required - Three state outputs - Data control for upper and lower bytes - Industrial and Automotive temperature support - Lead-free available - Error Detection and Error Correction DESCRIPTION The ISSI IS61/64WV6416EEBLL is a high-speed, 1,048,576-bit static RAMs organized as 65,536 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. FUNCTIONAL BLOCK DIAGRAM The IS61/64WV6416EEBLL is packaged in the JEDEC standard 44-pin TSOP-II, 48-pin Mini BGA (6mm x 8mm), and 44-pin SOJ. A0-A15 Decoder Memory Lower IO Array64Kx8 ECC Array64K x4 Memory Upper IO Array64Kx8 ECC Array64K x4 IO0-7 IO8-15 I/O...