TC224
Overview
- High Performance Microcontroller with one CPU core
- Power Efficient scalar TriCore CPU (TC1.6E), having the following features: - Binary code compatibility with TC1.6P - 133 MHz operation at full temperature range - 88 Kbyte Data Scratch-Pad RAM (DSPR) - 8 Kbyte Instruction Scratch-Pad RAM (PSPR) - 8 Kbyte Instruction Cache (ICACHE) - 4 line read buffer (DRB)
- Lockstepped shadow core for TC1.6E
- Multiple on-chip memories - All embedded NVM and SRAM are ECC protected - 1 Mbyte Program Flash Memory (PFLASH) - 96 Kbyte Data Flash Memory (DFLASH) usable for EEPROM emulation - BootROM (BROM)
- 16-Channel DMA Controller with safe data transfer
- Sophisticated interrupt system (ECC protected)
- High performance on-chip bus structure - 64-bit Cross Bar Interconnect (SRI) giving fast parallel access between bus masters, CPUs and memories - 32-bit System Peripheral Bus (SPB) for on-chip peripheral and functional units - One bus bridge (SFI Bridge)
- Safety Management Unit (SMU) handling safety monitor alarms
- Memory Test Unit with ECC, Memory Initialization and MBIST functions (MTU)
- Hardware I/O Monitor (IOM) for checking of digital I/O
