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MK2049-01 Datasheet Communications Clock Pll

Manufacturer: Integrated Circuit Systems

Overview: MK2049-01 Communications Clock PLL.

General Description

The MK2049 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference and generates T1, E1, T3, E3, and OC3 frequencies.

The device can also accept a T1, E1, T3, or E3 input clock and provide the same output for loop timing.

All outputs are frequency locked together and to the input.

Key Features

  • Packaged in 20 pin SOIC.
  • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E.
  • Accepts multiple inputs: 8 kHz backplane clock or Loop Timing frequencies.
  • Locks to 8 kHz ±100 ppm (External mode).
  • Exact internal ratios eliminate the need for external dividers.
  • Zero ppm synthesis error in all output clocks.
  • Output clock rates include.

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MK2049-01 Distributor