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IS41LV85120A - 512K x 8 (4-MBIT) DYNAMIC RAM

Download the IS41LV85120A datasheet PDF. This datasheet also covers the IS41C85120A variant, as both devices belong to the same 512k x 8 (4-mbit) dynamic ram family and are provided as variant models within a single manufacturer datasheet.

General Description

The ISSI IS41C85120A and IS41LV85120A are 524,288 x 8bit high-performance CMOS Dynamic Random Access Memory.

Both products offer accelerated cycle access EDO Page Mode.

EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10ns per 8-bit word.

Key Features

  • TTL compatible inputs and outputs.
  • Refresh Interval: 1024 cycles/16 ms.
  • Refresh Mode : RAS-Only, CAS-before-RAS (CBR), and Hidden.
  • JEDEC standard pinout.
  • Single power supply 5V ± 10% (IS41C85120A) 3.3V ± 10% (IS41LV85120A).
  • Lead-free available ISSI APRIL 2005 ® www. DataSheet4U. com.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS41C85120A_IntegratedSiliconSolution.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IS41C85120A IS41LV85120A 512K x 8 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE FEATURES • TTL compatible inputs and outputs • Refresh Interval: 1024 cycles/16 ms • Refresh Mode : RAS-Only, CAS-before-RAS (CBR), and Hidden • JEDEC standard pinout • Single power supply 5V ± 10% (IS41C85120A) 3.3V ± 10% (IS41LV85120A) • Lead-free available ISSI APRIL 2005 ® www.DataSheet4U.com DESCRIPTION The ISSI IS41C85120A and IS41LV85120A are 524,288 x 8bit high-performance CMOS Dynamic Random Access Memory. Both products offer accelerated cycle access EDO Page Mode. EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10ns per 8-bit word.