Description
A0-A11 BA0, BA1 DQ0 to DQ15 CLK CKE CS RAS CAS Address Input Bank Select Address Data I/O System Clock Input Clock Enable Chip Select Row Address Strobe Command Column Address Strobe Command WE LDQM UDQM VDD GND VDDQ GNDQ NC Write Enable Lower Bye, Input/Output Mask Upper Bye, Input/Output Mask Pow
Features
- Clock frequency: 143 MHz.
- Fully synchronous; all signals referenced to a positive clock edge.
- Internal bank for hiding row access/precharge.
- Single 3.3V power supply.
- LVTTL interface.
- Programmable burst length.
- (1, 2, 4, 8, full page).
- Programmable burst sequence: Sequential/Interleave.
- Self refresh modes.
- 4096 refresh cycles every 64 ms.
- Random column address every clock cycle.
- Programma.