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MD56V62160M-7TA - SYNCHRONOUS DYNAMIC RAM

Datasheet Summary

Description

The MD56V62160M-xxTA is a 4-Bank 1,048,576-word 16-bit Synchronous dynamic RAM fabricated in LAPIS Semiconductor’s silicon-gate CMOS technology.

The device operates at 3.3V.

The inputs and outputs are LVTTL compatible.

Features

  • Product Name Organization Address Size Power Supply VCC (Core) Power Supply VCCQ (I/O) Interface Operating Frequency Operating Temperature Functions /CAS Latency Burst Length Burst Type Write Mode Refresh Package MD56V62160M-xxTA xx indicates speed rank. 4Bank x 1,048,576Word x 16Bit 4,096Row x 256Column 3.3V0.3V 3.3V0.3V LVTTL compatible Max. 143MHz (Speed Rank 7) 0 to 70°C General-purpose SDRAM command interface Mode register CL setting: 2, 3 Mode register BL setting:1, 2, 4, 8, Full page M.

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Datasheet Details

Part number MD56V62160M-7TA
Manufacturer LAPIS
File Size 452.56 KB
Description SYNCHRONOUS DYNAMIC RAM
Datasheet download datasheet MD56V62160M-7TA Datasheet
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Full PDF Text Transcription

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MD56V62160M-xxTA 4-Bank×1,048,576-Word×16-Bit SYNCHRONOUS DYNAMIC RAM FEDD56V62160MTA-06 Issue Date : Feb. 12, 2014 DESCRIPTION The MD56V62160M-xxTA is a 4-Bank 1,048,576-word 16-bit Synchronous dynamic RAM fabricated in LAPIS Semiconductor’s silicon-gate CMOS technology. The device operates at 3.3V. The inputs and outputs are LVTTL compatible. FEATURES Product Name Organization Address Size Power Supply VCC (Core) Power Supply VCCQ (I/O) Interface Operating Frequency Operating Temperature Functions /CAS Latency Burst Length Burst Type Write Mode Refresh Package MD56V62160M-xxTA xx indicates speed rank. 4Bank x 1,048,576Word x 16Bit 4,096Row x 256Column 3.3V0.3V 3.3V0.3V LVTTL compatible Max.
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