GAL20LV8 Description
The GAL20LV8D, at 3.5 ns maximum propagation delay time, provides the highest speed performance available in the PLD market. The GAL20LV8D is manufactured using Lattice Semiconductor's advanced 3.3V E2CMOS process, which bines CMOS with Electrically Erasable (E2) floating gate technology. High speed erase times (<100ms) allow the devices to be reprogrammed quickly and efficiently.
GAL20LV8 Key Features
- HIGH PERFORMANCE E2CMOS® TECHNOLOGY
- 3.5 ns Maximum Propagation Delay
- Fmax = 250 MHz
- 2.5 ns Maximum from Clock Input to Data Output
- UltraMOS® Advanced CMOS Technology
- TTL-patible Balanced 8mA Output Drive
- 3.3V LOW VOLTAGE 20V8 ARCHITECTURE
- JEDEC-patible 3.3V Interface Standard
- 5V patible Inputs
- ACTIVE PULL-UPS ON ALL PINS
GAL20LV8 Applications
- Glue Logic for 3.3V Systems