GAL20LV8ZD
Overview
The GAL20LV8ZD, at 100 µA standby current and 15ns propagation delay provides the highest speed low-voltage PLD available in the market. The GAL20LV8ZD is manufactured using Lattice Semiconductor's advanced 3.3V E2CMOS process, which combines CMOS with Electrically Erasable (E2) floating gate technology.
- 3.3V LOW VOLTAGE, ZERO POWER OPERATION - JEDEC Compatible 3.3V Interface Standard - Interfaces with Standard 5V TTL Devices - 50µA Typical Standby Current (100µA Max.) - 45mA Typical Active Current (55mA Max.) - Dedicated Power-down Pin
- HIGH PERFORMANCE E2CMOS TECHNOLOGY - TTL Compatible Balanced 8 mA Output Drive - 15 ns Maximum Propagation Delay - Fmax = 62.5 MHz - 10 ns Maximum from Clock Input to Data Output - UltraMOS® Advanced CMOS Technology
- E CELL TECHNOLOGY - Reconfigurable Logic - Reprogrammable Cells - 100% Tested/100% Yields - High Speed Electrical Erasure (<100ms) - 20 Year Data Retention
- EIGHT OUTPUT LOGIC MACROCELLS - Maximum Flexibility for Complex Logic Designs - Programmable Output Polarity
- PRELOAD AND POWER-ON RESET OF ALL REGISTERS - 100% Functional Testability
