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GAL20VP8 - High-Speed E2CMOS PLD Generic Array Logic

General Description

The GAL20VP8, with 64 mA drive capability and 15 ns maximum propagation delay time is ideal for Bus and Memory control applications.

The GAL20VP8 is manufactured using Lattice Semiconductor's advanced E2CMOS process which combines CMOS with Electrically Erasable (E2) floating gate technology.

Key Features

  • HIGH DRIVE E2CMOS® GAL® DEVICE.
  • TTL Compatible 64 mA Output Drive.
  • 15 ns Maximum Propagation Delay.
  • Fmax = 80 MHz.
  • 10 ns Maximum from Clock Input to Data Output.
  • UltraMOS® Advanced CMOS Technology.

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Datasheet Details

Part number GAL20VP8
Manufacturer Lattice Semiconductor
File Size 263.37 KB
Description High-Speed E2CMOS PLD Generic Array Logic
Datasheet download datasheet GAL20VP8 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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GAL20VP8 High-Speed E2CMOS PLD Generic Array Logic™ Features • HIGH DRIVE E2CMOS® GAL® DEVICE — TTL Compatible 64 mA Output Drive — 15 ns Maximum Propagation Delay — Fmax = 80 MHz — 10 ns Maximum from Clock Input to Data Output — UltraMOS® Advanced CMOS Technology • ENHANCED INPUT AND OUTPUT FEATURES — Schmitt Trigger Inputs — Programmable Open-Drain or Totem-Pole Outputs — Active Pull-Ups on All Inputs and I/O pins • E CELL TECHNOLOGY — Reconfigurable Logic — Reprogrammable Cells — 100% Tested/100% Yields — High Speed Electrical Erasure (<100ms) — 20 Year Data Retention • EIGHT OUTPUT LOGIC MACROCELLS — Maximum Flexibility for Complex Logic Designs — Programmable Output Polarity — Architecturally Compatible with Standard GAL20V8 • PRELOAD AND POWER-ON RESET OF ALL REGISTERS — 100% Functio