MT48LC2M32B2 Datasheet PDF - MICRON SDR SDRAM Specs

MT48LC2M32B2 - SDR SDRAM

Datasheet Summary

Description

7 Automotive Temperature 7 Functional Block Diagrams 8 Pin and Ball Assignments and Descriptions 9 Package Dimensions 12 Temperature and Thermal Impedance 14 Electrical Specifications 17 Electrical Specifications IDD Parameters 19 Electrical Specifications AC Operating Co

Features

Features.
PC100-compliant.
Fully synchronous; all signals registered on positive edge of system clock.
Internal pipelined operation; column address can be changed every clock cycle.
Internal banks for hiding row access/precharge.
Programmable burst lengths: 1, 2, 4, 8, or full page.
Auto precharge, includes concurrent auto precharge and auto refresh modes.
Self refresh mode (not available on AT devices).
Auto refresh.

Datasheet Details

Part number	MT48LC2M32B2
Manufacturer	MICRON
File Size	3.60 MB
Description	SDR SDRAM
Datasheet	MT48LC2M32B2 Datasheet
Additional preview pages of the MT48LC2M32B2 datasheet.

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Full PDF Text Transcription

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SDR SDRAM MT48LC2M32B2 – 512K x 32 x 4 Banks 64Mb: x32 SDRAM Features Features • PC100-compliant • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle • Internal banks for hiding row access/precharge • Programmable burst lengths: 1, 2, 4, 8, or full page • Auto precharge, includes concurrent auto precharge and auto refresh modes • Self refresh mode (not available on AT devices) • Auto refresh – 64ms, 4096-cycle refresh (commercial and industrial) – 16ms, 4096-cycle refresh (automotive) • LVTTL-compatible inputs and outputs • Single 3.3V ±0.

Published: Jul 18, 2005 |