Datasheet Summary
40V(D-S) N-Channel Enhancement Mode Power MOS FET
General Features
- VDS =40V,ID =12A RDS(ON) <12mΩ @ VGS=10V (Typ. 8.4 mΩ) RDS(ON) <18mΩ @ VGS=4.5V (Typ. 12.3 mΩ)
- High density cell design for ultra low Rdson
- Fully characterized avalanche voltage and current
- Good stability and uniformity with high EAS
- Excellent package for good heat dissipation
- Special process technology for high ESD capability
Lead Free
Application
- Load switching
- Hard switched and high frequency circuits
- Uninterruptible power supply
Marking and pin Assignment
PIN Configuration
SOP-8 top view
Schematic diagram
Package Marking and Ordering Information
Device Marking
Device
Device...