Click to expand full text
Micrel, Inc.
LOW-POWER 9-BIT INVERTER
SY100S321
SY100S321
FEATURES
DESCRIPTION
s Max. propagation delay of 700ps s IEE min. of –55mA s Extended supply voltage option:
VEE = –4.2V to –5.5V s Voltage and temperature compensation for
improved noise immunity s 70% faster than Fairchild 300K at lower power s Internal 75kΩ input pull-down resistors s Function and pinout compatible with Fairchild F100K s Available in 28-pin PLCC package
The SY100S321 is a monolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output.
BLOCK DIAGRAM
D1 D2 D3 D4 D5 D6 D7 D8 D9
O1 O2 O3 O4 O5 O6 O7 O8 O9
PIN NAMES
Pin D1 – D9 Q1 – Q9 VEES VCCA
Function Data Inputs Data Outputs VEE Substrate VCCO for ECL Outputs
M9999-042307 hbwhelp@micrel.