SY100S325 Datasheet | Micrel Semiconductor

Micrel, Inc. NOT REMENDED FOR NEW DESIGNS LOW-POWER HEX ECL-to-TTL TRANSLATOR Features DESCRIPTION s Max. propagation delay of 3.7ns s IEE min. of - 37m A s TTL outputs s Extended supply voltage option: VEE = - 4.2V to - 5.5V s 25% faster than National's 325 s Differential inputs with built-in offset s Voltage and temperature pensation for improved noise immunity s VBB output for single-ended use s Internal 75KΩ input pull-down resistors s Function and pinout patible with Fairchild F100K s Available in 28-pin PLCC package The SY100S325 are hex translators for converting 100K ECL logic levels to TTL logic levels. Inputs can be used as inverting, non-inverting or differential receivers. An internal reference voltage generator provides VBB for single-ended operation or for use in Schmitt trigger applications. All inputs have 75KΩ pull-down resistors. The outputs will go LOW when the inputs are either open or have the same potential. When used in single-ended operation, the apparent input threshold of the true inputs is 20m V to 40m V higher (positive) than the threshold of the plementary inputs. The VTTL and VEE power may be applied in either order. BLOCK DIAGRAM D0 D0 D1 D1 D2 D2 D3 D3 D4 D4 D5 D5 VBB Q0 Q1 Q2 Q3 Q4 Q5 PIN NAMES Pin D0- D5 D0- D5 Q0- Q5 VEES VTTL VCCA Function Data Inputs Inverting Data Inputs Data Outputs VEE Substrate TTL VCC Power Supply VCCO for ECL Outputs M9999-051607 hbwhelp@micrel. or (408) 955-1690 Rev.: I Amendment: /0 Issue Date: May 2007 Micrel, Inc. PACKAGE/ORDERING INFORMATION Q3 Q4 Q5 VEES D5 D5 D4 VTTL VTTL VCC VCC VCC Q2 Q1 25 24 23 22 21 20 19 26 18 27 17 28...