SY100S391 Datasheet | Micrel Semiconductor

Micrel, Inc. NOT REMENDED FOR NEW DESIGNS LOW-POWER HEX TTL-TO-PECL TRANSLATOR Features DESCRIPTION s Operates from a single +5V supply s Differential PECL outputs s Function and pinout patible with Fairchild F100K s Available in 28-pin PLCC packages BLOCK DIAGRAM The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logic levels. The unique feature of this translator is the ability to do this translation using only one +5V supply. The differential outputs allow each circuit to be used as an inverting/non-inverting translator, or as a differential line driver. A mon enable (E), when LOW, holds all inverting outputs HIGH and all non-inverting inputs LOW. The SY100S391 is ideal for those mixed PECL/TTL applications which only have a +5V supply available. When used in the differential mode, the S391, due to its high mon mode rejection, overes voltage gradients between the TTL and PECL ground systems. Q0 D0 Q0 PIN NAMES Q1 D1 Q1 Pin Function D0 - D5 Data Inputs (TTL) Q2 Q0 - Q5 Data Outputs (PECL) D2 Q2 Q0 - Q5 Inverting Data Outputs (PECL) Q3 E Enable Input (TTL) D3 Q3 VCCA VCCO for ECL Outputs Q4 D4 Q4 Q5 D5...