ZL30254 Overview
Key Features
- Two CMOS inputs, both 8kHz or 25MHz
- Inputs continually monitored for frequency accuracy (±1%)
- Automatic revertive reference switching Low-Bandwidth DPLL
- 25Hz bandwidth for jitter attenuation
- ±120ppm tracking range
- Digital hold on loss of all inputs Clock Multiplier APLL and Output Clocks
- Easy-to-configure, encapsulated design requires no external VCXO or loop filter components
- Two CML outputs, both 125MHz or 156.25MHz
- Outputs easily interface with CML, LVDS or LVPECL components
