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LS830 - Low Leakage

Key Features

  • a 5mV offset and 10-µV/°C drift. The 8 Pin P-DIP and 8 Pin SOIC provide ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information).

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Datasheet Details

Part number LS830
Manufacturer Micross
File Size 295.67 KB
Description Low Leakage
Datasheet download datasheet LS830 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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LS830 MONOLITHIC DUAL N-CHANNEL JFET Linear Systems Ultra Low Leakage Low Drift Monolithic Dual JFET The LS830 is a high-performance monolithic dual JFET featuring extremely low noise, tight offset voltage and low drift over temperature specifications, and is targeted for use in a wide range of precision instrumentation applications. The LS830 features a 5mV offset and 10-µV/°C drift. The 8 Pin P-DIP and 8 Pin SOIC provide ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information). FEATURES  ULTRA LOW DRIFT  | V GS1‐2 / T| ≤ 5µV/°C TYP.  ULTRA LOW LEAKGE  IG = 80fA TYP.  LOW NOISE  en = 70nV/√Hz TYP.  LOW CAPACITANCE  CISS = 3pF MAX.