Datasheet Details
| Part number | 74LS77 |
|---|---|
| Manufacturer | Motorola Semiconductor (now NXP Semiconductors) |
| File Size | 71.00 KB |
| Description | 4-BIT D LATCH LOW-POWER SCHOTTKY |
| Datasheet | 74LS77_MotorolaInc.pdf |
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Overview: 4-BIT D LATCH The TTL/MSI SN54 / 74LS75 and SN54 / 74LS77 are latches used as temporary storage for binary information between processing units and input /output or indicator units. Information present at a data (D) input is transferred to the Q output when the Enable is HIGH and the Q output will follow the data input as long as the Enable remains HIGH. When the Enable goes LOW, the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the Enable is permitted to go HIGH.
| Part number | 74LS77 |
|---|---|
| Manufacturer | Motorola Semiconductor (now NXP Semiconductors) |
| File Size | 71.00 KB |
| Description | 4-BIT D LATCH LOW-POWER SCHOTTKY |
| Datasheet | 74LS77_MotorolaInc.pdf |
|
|
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| Part Number | Description |
|---|---|
| 74LS73 | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| 74LS74A | DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP |
| 74LS75 | 4-BIT D LATCH |
| 74LS76A | DUAL JK FLIP-FLOP |
| 74LS783 | Synchronous Address Multiplexer |
| 74LS00 | QUAD 2-INPUT NAND GATE |
| 74LS01 | QUAD 2-INPUT NAND GATE |
| 74LS04 | HEX INVERTER |
| 74LS05 | HEX INVERTER |
| 74LS09 | QUAD 2-INPUT AND GATE |