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MCM63P733A - 128K x 32 Bit Pipelined BurstRAM Synchronous Fast Static RAM

Description

Pin Locations 85 Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new external address.

Used to initiate a READ, WRITE, or chip deselect.

Features

  • LE Cycle Type Read Read Write Byte a Write Byte b Write Byte c Write Byte d Write All Bytes Write All Bytes SGW H H H H H H H L SW H L L L L L L X SBa X H L H H H L X SBb X H H L H H L X SBc X H H H L H L X SBd X H H H H L L X.

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Datasheet Details

Part number MCM63P733A
Manufacturer Motorola
File Size 238.09 KB
Description 128K x 32 Bit Pipelined BurstRAM Synchronous Fast Static RAM
Datasheet download datasheet MCM63P733A Datasheet
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Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM63P733A/D Advance Information MCM63P733A 128K x 32 Bit Pipelined BurstRAM Synchronous Fast Static RAM The MCM63P733A is a 4M–bit synchronous fast static RAM designed to provide a burstable, high performance, secondary cache for the PowerPC™ and other high performance microprocessors. It is organized as 128K words of 32 bits each, fabricated with high performance silicon gate CMOS technology. This device integrates input registers, an output register, a 2–bit address counter, and high speed SRAM onto a single monolithic circuit for reduced parts count in cache data RAM applications. Synchronous design allows precise cycle control with the use of an external clock (K).
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