Description
Symbol PC BLK LE OE A1 to A3
(6)
Pin Name Polarity change input Blank input Latch enable input Output enable RIGHT data input/output LEFT data input/output
(Note)
Description PC = L: All driver output invert BLK = H : All output = H or L Automatically executes latch by setting high at rising edge
Features
- Selectable by IBS pin; three 32-bit bi-directional shift register circuits configuration or six 16-bit bi-directional shift register circuits configuration.
- Data control with transfer clock (external) and latch.
- High-speed data transfer (fmax. = 25 MHz min. at data fetch) (fmax. = 15 MHz min. at cascade connection).
- High withstand output voltage (80 V, 50 mA MAX. ).
- 3.3 V CMOS input interface.
- High withstand voltage CMOS structure.
- C.
UPD16334 Datasheet
