Description
Symbol PC BLK LE OE A1 to A3 (6) B1 to B3 (6) CLK R/L Blank input Latch enable input Output enable RIGHT data input/outputNote Pin Name Polarity change input Description PC = L: All driver output invert BLK = H: All output = H or L Data latch by rising edge of this signal.
Features
- Selectable by IBS pin; three 32-bit bi-directional shift register circuits configuration or six 16-bit bi-directional shift register circuits configuration.
- Data control with transfer clock (external) and latch.
- High-speed data transfer (fmax. = 25 MHz min. at data fetch) (fmax. = 16 MHz min. at cascade connection).
- High withstand output voltage (80 V, +50/.
- 75 mAMAX. ).
- 5 V CMOS input interface.
- High withstand voltage CMOS structure.
UPD16335 Datasheet
