PHN203 Datasheet | NXP Semiconductors

Philips Semiconductors Product specification Dual N-channel enhancement mode Trench MOSTM transistor Features - Dual device - Low threshold voltage - Fast switching - Logic level patible - Surface mount package SYMBOL d1 d1 d2 d2 QUICK REFERENCE DATA VDS = 25 V ID = 6.3 A RDS(ON) ≤ 30 mΩ (VGS = 10 V) RDS(ON) ≤ 55 mΩ (VGS = 4.5 V) s1 g1 s2 g2 GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic envelope using ’trench’ technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications. The PHN203 is supplied in the SOT96-1 (SO8) surface mounting package. PINNING PIN 1 2 3 4 5,6 7,8 DESCRIPTION source 1 gate 1 source 2 gate 2 drain 2 drain 1 SOT96-1 8 7 6 5 pin 1 index LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDS VDGR VGS ID ID IDM Ptot Tstg, Tj PARAMETER Repetitive peak drain-source voltage Continuous drain-source voltage Drain-gate voltage Gate-source voltage Drain current per MOSFET1 Drain current per MOSFET (both MOSFETs conducting)1 Drain current per MOSFET (pulse peak value) Total power dissipation (either or both MOSFETs conducting)1 Storage & operating temperature CONDITIONS Tj = 25 ˚C to 150˚C RGS = 20 kΩ Ta = 25 ˚C Ta = 70 ˚C Ta = 25 ˚C Ta = 70 ˚C Ta = 25 ˚C Ta = 25 ˚C Ta = 70 ˚C MIN. - 55 MAX. 25 25 25 ± 20 6.3 5 4.4 3.5 25 2 1.3 150 UNIT V V V V A A A A A W W ˚C 1 Surface mounted on FR4 board, t ≤ 10 sec January 1999 1 Rev 1.000 Philips Semiconductors Product specification Dual N-channel enhancement mode Trench MOSTM transistor THERMAL RESISTANCES SYMBOL PARAMETER Rth j-a Rth j-a Thermal resistance junction to ambient Thermal resistance junction to ambient CONDITIONS Surface mounted on FR4 board, t ≤ 10 sec; either or both MOSFETs conducting Surface mounted on FR4 board; either or both MOSFETs conducting TYP. 150 MAX. 62.5 - PHN203 UNIT K/W...